The invention relates to a semiconductor memory, particularly, to a semiconductor memory to which data is inputted or from which data is outputted at a frequency higher than a clock frequency.
There has been recently developed a semiconductor memory capable of inputting and outputting data in synchronization with dual edge (leading edge and trailing edge of a clock) in view of data transfer at high speed.
The semiconductor memory capable of inputting and outputting data at a frequency higher than a clock frequency is disclosed, for example, in Jei-Hawn Yoo, "A 32-Bank 1 Gb DRAM with 1 Gb/s Bandwidth," 1996 IEEE International Solid-State Circuits Conference, pp. 378-379.
A conventional semiconductor memory such as a synchronous dynamic RAM (SDRAM) can mask data which are consecutively inputted and outputted therethrough. For example, data which is not needed to be reloaded is masked when data is written. Data which is not needed to be outputted to an external device is masked when data is read, With this operation, the conventional semiconductor memory realizes efficient data processing.
In the conventional data masking, data has been masked by two units, four units, etc. but data has not been masked one by one when data is inputted or outputted at a frequency higher than a clock frequency. It has been desired recently to mask data one by one for efficiently processing data.